UART Controller

Block Diagram

I2C Master



  • Technology independent, can be synthesized to any FPGA, CPLD or ASIC vendor
  • Fully compliant to the TIA-232-F
  • Configurable baud rate, number of data bits, parity and stop bits
  • Fully deterministic handshake interface that allows easy handling of reception/transmission requests
  • Interfaceable to standard RS-232 drivers
  • Provided as VHDL source code
  • Includes 5 hours of email support