Our DO-254 IP Cores
SafeCore offers an assortment of IP Cores. An IP Core is a reusable unit of programmable logic, which is used as building block in ASIC and FPGA designs. SafeCore´s IP Cores are developed according to RTCA DO-254 / EUROCAE ED-80 guidance with DAL A criteria. Each IP Core has a DO-254 / ED-80 Certification Kit, which is offered together with the IP Core.
Unless otherwise specified, all our IP Cores are technology independent. This means that the HDL code is written in such a way that it can be synthetized to any FPGA or ASIC without modifications.
SafeCore also offers the possibility to customize the IP Cores, as well as other custom development services.
For clients intending to use our IP Cores in high radiation environments (like aircrafts or spacecrafts), SafeCore offers radiation-hardened versions of the IP Cores. The radiation-hardened versions apply techniques like Triple Modular Redundancy (TMR) and Error-Correcting Codes (ECC) to mitigate Single Event Effects (SEE) caused by radiation.
SafeCore offers two types of licenses for its IP Cores: project-locked and lifelong. Under project-locked license, the IP Core can be used for a specific project in a specific program. Under lifelong license, the IP Core can be used in an unlimited amount of projects. Contact us for additional information regarding licensing.
ARINC-664(AFDX) and Ethernet IPs
| IP Core | Description |
|---|---|
| ARINC 664 (AFDX) End System DO-254 IP Core | The ARINC 664 (AFDX) End System DO-254 IP Core (AFDX ES IP) implements an AFDX End System as specified in ARINC 664 Part 7 “Avionics Full-Duplex Switched Ethernet (AFDX) Network”. |
| 10/100/1000 Ethernet MAC DO-254 IP Core | The 10/100/1000 Ethernet MAC Controller DO-254 IP Core implements the Media Access Control as specified in the IEEE 802.3-2-008 specification. |
CAN, CAN FD and ARINC-825 IPs
| IP Core | Description |
|---|---|
| CAN Controller | The CAN Controller implements a Controller Area Network as specified in the ISO 11898 Part 1 and in the CAN Specification Version 2.0. |
| CAN FD Controller | The CAN FD Controller implements a Controller Area Network as specified in the ISO 11898:2015 |
ARINC-429 IPs
| IP Core | Description |
|---|---|
| ARINC 429 Transmitter | The ARINC 429 Tx IP Core implements a transmitter as specified in the ARINC Specification 429 Part 1-17. |
| ARINC 429 Receiver | The ARINC 429 Rx IP Core implements a receiver as specified in the ARINC Specification 429 Part 1-17. |
MIL-STD-1553B IPs
| IP Core | Description |
|---|---|
| MIL-STD-1553B Remote Terminal | The 1553B RT Core implements a Remote Terminal as specified in the MIL-STD-1553B specification, including Notes 1 through 7. |
UART, SPI and I2C IPs
| IP Core | Description |
|---|---|
| UART | The UART Core implements an Universal Asynchronous Receiver/Transmitter that can be used in conjunction with communication standards such as TIA (formerly EIA) RS-232, RS-422 or RS-485 |
| I2C Slave | The I2C Slave IP Core implements an I2C Slave fully compliant to the I2C-bus specification and user manual Rev. 5 – 9 October 2012 for Standard-mode, Fast-mode and Fast-mode Plus (Fm+). |
| I2C Master | The I2C Master IP Core implements an I2C Master fully compliant to the I2C-bus specification and user manual Rev. 5 – 9 October 2012 for Standard-mode, Fast-mode and Fast-mode Plus (Fm+). |
| SPI Master | The SPI Master IP Core implements an SPI Master fully compliant to the SPI Standard (Motorola’s M68H11 Reference Manual). |
| SPI Slave | The SPI Slave IP Core implements an SPI Slave fully compliant to the SPI Standard (Motorola’s M68H11 Reference Manual). |
Memory Controller IPs
| IP Core | Description |
|---|---|
| SDRAM Controller | The SDRAM Controller implements a controller for Single Data Rate Synchronous Dynamic Random Access Memory (SDR SDRAM) devices as specified in the JEDEC Standard No. 21-C Page 3.11.5.1 Release 12. |